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HCS05MS
September 1995
Radiation Hardened Hex Inverter with Open Drain
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW
A1 1 Y1 2 A2 3 Y2 4 A3 5 Y3 6 GND 7 14 VCC 13 A6 12 Y6 11 A5 10 Y5 9 A4 8 Y4
Features
* 3 Micron Radiation Hardened SOS CMOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) * Dose Rate Survivability: >1 x * Dose Rate Upset >10
10
1012
RAD (Si)/s
RAD (Si)/s 20ns Pulse
* Latch-Up Free Under Any Conditions * Military Temperature Range: -55oC to +125oC * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min * Input Current Levels Ii 5A at VOL, VOH
A1
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C TOP VIEW
1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC A6 Y6 A5 Y5 A4 Y4
Description
The Intersil HCS05MS is a Radiation Hardened Hex inverter function with open drain outputs. These open drain outputs can drive into resistive loads with a separate voltage supply. The HCS05MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS05MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line Package (D suffix).
Y1 A2 Y2 A3 Y3 GND
Functional Diagram
Yn An
Ordering Information
PART NUMBER HCS05DMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample PACKAGE 14 Lead SBDIP
TRUTH TABLE INPUTS An L H Z (Note 1) L OUTPUTS Yn H (Note 2)
HCS05KMSR
14 Lead Ceramic Flatpack 14 Lead SBDIP
HCS05D/ Sample HCS05K/ Sample HCS05HMSR
Sample
14 Lead Ceramic Flatpack Die
NOTES: 1. No pullup resistor 2. With pullup resistor 3. L = Low 4. H = High
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
35
518829 3557.1
Specifications HCS05MS
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . 100ns/V Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 70% of VCC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 1 2, 3 1, 2, 3 1, 2, 3 1 2, 3 1 2, 3 7, 8A, 8B LIMITS TEMPERATURE +25oC +125oC, -55oC MIN 4.8 4.0 MAX 10 200 0.1 0.1 0.5 5.0 1 50 UNITS A A mA mA V V A A A A V
PARAMETER Supply Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V (Note 2) VCC = 5.5V, VIH = 3.85V, VIL = 1.35V, IOL = 50A VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, IOL = 50A,
Output Current (Sink) Output Voltage Low
IOL
+25oC +125oC, -55oC
VOL
+25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +125oC, -55oC
Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test
IIN
VCC = 5.5V, VIN = VCC or GND VCC = 5.5V, Force Voltage = VCC VCC = 4.5V, VIH = 3.15, VIL = 1.35 (Note 3)
IOZH
+25oC +125oC, +25oC, -55oC -55oC
FN
+125oC,
NOTES: 1. All voltages reference to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 LIMITS TEMPERATURE +25oC +125oC, -55oC MIN 2 2 MAX 18 20 UNITS ns ns
PARAMETER Propagation Delay An to Yn NOTES:
SYMBOL TPLZ TPZL
(NOTES 1, 2) CONDITIONS VCC = 4.5V, VIH = 4.5V, VIL = 0V
1. All voltages referenced to device GND. 2. Measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns.
Spec Number 36
518829
Specifications HCS05MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation Input Capacitance SYMBOL CPD CONDITIONS VCC = 5.0V, VIH = 5.0V, VIL = 0.0V, f = 1MHz VCC = 5.0V, VIH = 5.0V, VIL = 0.0V, f = 1MHz VCC = 4.5V, VIH = 4.5V, VIL = 0.0V NOTES 1 1 1 1 1 1 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 1 1 MAX 15 23 10 10 15 22 UNITS pF pF pF pF ns ns
CIN
Output Transition Time NOTE:
TTHL
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Supply Current Output Current (Sink) Output Voltage Low SYMBOL ICC IOL VOL (NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V VCC = 5.5V , VIH = 3.85V, VIL = 1.65V, IOL = 50A VCC = 4.5V , VIH = 3.15V, VIL = 1.35V, IOL = 50A Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test Propagation Delay IIN IOZH VCC = 5.5V, VIN = VCC or GND VCC = 5.5V, Force Voltage = 0V or VCC TEMPERATURE +25oC +25oC +25oC MIN 4.0 MAX 0.2 0.1 UNITS mA mA V
+25oC
-
0.1
V
+25oC +25oC
-
5 50
A A
FN
VCC = 4.5V, VIH =3.15V, VIL = 1.35V, (Note 2) VCC = 4.5V, VIH =4.5V, VIL = 0V
+25oC
-
-
V
TPLZ TPZL
+25oC
2
20
ns
NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 5. DELTA PARAMETERS (+25oC) PARAMETER Supply Current Three-State Leaking Current Output Current SYMBOL ICC IOZH IOL GROUP B SUBGROUP +3 200 -15 UNITS A nA %
Spec Number 37
518829
Specifications HCS05MS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised. METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 ICC, IOL, IOZH READ AND RECORD ICC, IOL, IOZH ICC, IOL, IOZH ICC, IOL/H
TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TEST METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND VCC = 6V 0.5V 1/2 VCC = 3V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONDITIONS (Note 1) 1, 3, 5, 7, 9, 11, 13 2, 4, 6, 8, 10, 12, 14 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 2, 4, 6, 8, 10, 12 7 1, 3, 5, 9, 11, 13, 14 -
DYNAMIC BURN-IN I TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a series resistor of 10K 5%. 2. Each pin except VCC and GND will have a series resistor of 1K 5%. 7 14 2, 4, 6, 8, 10, 12 1, 3, 5, 9, 11, 13 -
TABLE 9. IRRADIATION TEST CONNECTIONS FUNCTION Irradiation Circuit (Note 1) OPEN 2, 4, 6, 8, 10, 12 GROUND 7 VCC = 5V 0.5V 1, 3, 5, 9, 11, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafe,r 0 failures.
Spec Number 38
518829
HCS05MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
Spec Number 39
518829
HCS05MS Three-State Low Timing Diagram and Load Circuit
VIH VS VSS TPZL TPLZ VOZ VOH VT VOL VOL OUTPUT VW OUTPUT 80% 20% TTHL INPUT VSS
Transition Timing Diagram
VIH VS INPUT
THREE-STATE LOW VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW GND HCS 4.50 4.50 2.25 2.25 0.90 0 UNITS V V V V V V
VCC
RL TEST POINT CL
DUT
CL = 50pF RL = 500
Spec Number 40
518829
HCS05MS Die Characteristics
DIE DIMENSIONS: 87 x 88 mils 2.20mm x 2.24mm METALLIZATION: Type: AlSi Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 x 4 mils
Metallization Mask Layout
HCS05MS
(14) VCC (13) A6 (1) A1 Y1 (2)
(12) Y6
A2 (3)
(11) A5
Y2 (4)
(10) Y5
A3 (5) (9) A4
GND (7)
Y3 (6)
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Y4 (8)
Spec Number 41
518829

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